Jerome Fron

There has been intense research in using degrees of freedom (or don't care conditions) to optimize sequential and combinational circuits. The scope of logic synthesis. however. is limited by the lack of information being passed from high-level synthesis tools. In this paper. we present a general framework to model the degrees of frea1om at the behavioral level. in a fonn that can be used by sequential logic synthesis. Behavior is specified by a set of concu"enl. inreraCling processes. Each process is described formally by its sel of execU/;on Iraces [1]. and represented by an ",-automaton [2]. This type of description allows the inclusion of don 'I care conditions in the specification by allowing multiple execution traces for a given input. Moreover. it allows us to cast the synthesis problem into a language containment problem. and to provide a fonnal description of these don't cares. We have developed a prOtotype version of a synthesis system based on this framework. targeting the synthesis of the control ponion of a circuiL Starting from a hardware description language HardwareC. a specification is expressed in terms of a set of interconnected ",-automata. These ",-automata s~ify the set of acceptable control schedules of a system. The synthesis process entails navigating thiS set. and implicit state traversal algorithms can be used to this purpose. In this paper. we demonstrate the feasibility of the approach by showing the possibility of traversing the state space of the specification automata.